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Title: Report on the ENIAC (Electronic numerical integrator and computer)
Author: Moore School of Electrical Engineering
Imprint: Philadelphia, Pa, 1946


Cycling Unit Pulses & Gates PX-9-306
ID: 39088015278674_0057
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Schematic diagram of program sequence for generating n ... PX-1-22
ID: 39088015278674_0063
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Initiating unit front view PX-9-305
ID: 39088015278674_0109
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Initiating device front panel PX-9-302 R
ID: 39088015278674_0111
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Power system block diagram. PX-1-303
ID: 39088015278674_0115
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A.C. power distribution rack. PX-1-304
ID: 39088015278674_0119
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Cycling unit front panel PX-9-303 R
ID: 39088015278674_0161
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Cycling unit front view. PX-9-304
ID: 39088015278674_0163
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Accumulator front view. PX-5-305
ID: 39088015278674_0185
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Accumulator front panel PX-5-301 R
ID: 39088015278674_0187
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Fig. 4-1. Set-up diagram symbols for accumulator
ID: 39088015278674_0235
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Fig. 4-2. Set-up diagram for problem of generating n ...
ID: 39088015278674_0241
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Fig. 4-3. Use of dummy programs to isolate program pulses
ID: 39088015278674_0247
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Fig. 4-4. Magnitude discrimination program
ID: 39088015278674_0251
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High speed multipower front view PX-6-309
ID: 39088015278674_0257
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High speed multiplier front panel no. 1 PX-6-302 R
ID: 39088015278674_0259
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High speed multiplier front panel no. 2 PX-6-303 R
ID: 39088015278674_0261
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High-speed multiplier front panel no. 3 PX-6 ...
ID: 39088015278674_0263
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Interconnection of high speed multiplier with associated accumulators ~ PX-6-311
ID: 39088015278674_0313
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Fig. 5-1. Set-up diagram conventions for high-speed multiplier
ID: 39088015278674_0327
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Divider-square rooter front view PX-10-302
ID: 39088015278674_0335
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Divider and square rooter front panel PX-10-301 R
ID: 39088015278674_0337
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Interconnection of divider & square rooter with associated accumulators ~ PX-10-307
ID: 39088015278674_0425
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Figure 6-1. Symbols used for divider and square rooter on set-up diagram. PX-10- ...
ID: 39088015278674_0449
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Fig. 6-2 (a). Set-up diagram for computation ... Master programmer panel 1 ... PX-10 ...
ID: 39088015278674_0459
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Fig. 6-2 (b). Set-up diagram for computation ... PX-10-102 (b)
ID: 39088015278674_0461
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Fig. 6-2 (c). Set-up diagram ... PX-10-402 (c)
ID: 39088015278674_0463
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Fig. 6-2 (d). Set-up diagram for computation ... PX-10-402 (d)
ID: 39088015278674_0465
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Fig. 6-2 (e). Set-up diagram for computation ... PX-10-402 (e)
ID: 39088015278674_0467
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Fig. 6-2 (f) Set-up diagram for computation ... PX-10-402 (f)
ID: 39088015278674_0469
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Fig. 6-2 (g) Set-up diagram for computation ... PX-10-402 (g)
ID: 39088015278674_0471
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Function table front view PX-7-305
ID: 39088015278674_0475
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Function table front panel no. 1 PX-7-302 R
ID: 39088015278674_0477
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Function table front panel no. 2 PX-7-303 R
ID: 39088015278674_0479
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Figure 7-1. Use of unmodified function table to store programming information
ID: 39088015278674_0525
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Figure 7-2. Set-up diagram conventions for the function table. PX-7 ...
ID: 39088015278674_0531
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Fig. 7-3 (a). Quadratic Lagrangian Interpolation - Set-up Diagram ... PX-7 ...
ID: 39088015278674_0535
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Fig. 6-3 (b). Quadratic Lagrangian Interpolation - Set-Up Diagram ... PX-7-403 b
ID: 39088015278674_0537
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Fig. 7-3 (c). Quadratic Lagrangian Interpolation - Set-Up Diagram ... PX-7-403 c
ID: 39088015278674_0539
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Fig. 7-3 (d) Quadratic Lagrangian Interpolation - Set-up Diagram ... PX ... 403d
ID: 39088015278674_0541
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Fig. 7-3 (e). Quadratic Interpolation - Set-up Diagram ... PX-7-403e
ID: 39088015278674_0543
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Figure 7-4. Storage of the G Function and Programming Instructions Regarding Use of the Tabulated Function ... PX-7-402
ID: 39088015278674_0563
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Constant transmitter front panel No. 1 PX-11-302 R
ID: 39088015278674_0569
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Constant transmitter front panel no. 2 PX-11-303 R
ID: 39088015278674_0571
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Constant transmitter front panel no. 3 PX-11-304 R
ID: 39088015278674_0573
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Constant transmitter front view PX-11-306
ID: 39088015278674_0575
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IBM Reader Plug Board PX-11-305 R
ID: 39088015278674_0611
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IBM Reader Plug Board PX-11-305 R1
ID: 39088015278674_0619
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IBM Reader Plug Board PX-11-305R2. Instructions
ID: 39088015278674_0623
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IBM Reader Plug Board PX-11-305R3. Instructions
ID: 39088015278674_0625
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IBM Reader Plug Board PX-11-305R4. Illustrative plug board connections for card fields storing negative numbers
ID: 39088015278674_0629
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Activation of Render Programming Circuits in Reading Detail ...
ID: 39088015278674_0639
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Fig. 8-1. Set-up diagram conventions for constant transmitter
ID: 39088015278674_0671
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Set-up table
ID: 39088015278674_0685
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Fig. 5-2. Master programmer lines evaluation ... PX-11-404
ID: 39088015278674_0687
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Fig 8-3 (a). Set-up diagram for sequence 1 and sequence 2.1. PX-11-405 (a)
ID: 39088015278674_0691
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Fig. 8-3 (b). Set-up diagram for sequence 1 and sequence 2.1
ID: 39088015278674_0693
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Fig. 8-3 (c). Set-up diagram for sequence 1 and sequence 2.1. PX-11- ...
ID: 39088015278674_0695
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Fig 8-3 (d) Set-up diagram for sequence 1 and sequence 2.1
ID: 39088015278674_0697
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Fig. 8-3 (e) Set-up diagram for sequence 1 and sequence 2.1
ID: 39088015278674_0699
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Fig. 8-3 (f) Set-up diagram for sequence 1 and sequence 2.1
ID: 39088015278674_0701
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Fig. 8-3 (g) Set-up diagram for sequence 1 and sequence 2.1. PX-11-405(g)
ID: 39088015278674_0703
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Fig. 8-3 (h) Set-up diagram for sequence 1 and sequence 2.1. PX-11-405(h)
ID: 39088015278674_0705
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Fig. 8-3 (j) Set-up diagram for sequence 1 and sequence 2.1
ID: 39088015278674_0707
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Figure 8-3 (k) Set-up diagram for sequence 1 and sequence 2.1. PX-11-405(k)
ID: 39088015278674_0709
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Figure 8-3 (1). Set-up diagram for sequence 1 and sequence 2.1
ID: 39088015278674_0711
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Fig. 8-3 (m). Set-up diagram for sequence 1 and sequence 2.1
ID: 39088015278674_0713
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Printer front panel no. 1 PX-12-301R
ID: 39088015278674_0723
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Printer front panel no. 2 PX-12-302R
ID: 39088015278674_0725
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Printer front panel no. 3 PX-12-303R
ID: 39088015278674_0727
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Printer front view. PX-12-306
ID: 39088015278674_0729
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Set-up table
ID: 39088015278674_0747
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Set-up table
ID: 39088015278674_0749
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Set-up table
ID: 39088015278674_0751
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Set-up table
ID: 39088015278674_0753
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IBM gang punch plug board PX-12-305R
ID: 39088015278674_0755
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IBM gang punch plug board PX-12-305R1
ID: 39088015278674_0759
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IBM gang punch plug board PX-12-305R2
ID: 39088015278674_0763
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IBM gang punch plug board. PX-12-305R3
ID: 39088015278674_0781
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Master programmer front view. PX-8-303
ID: 39088015278674_0787
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Master programmer front panel no. 1 PX-8-301R
ID: 39088015278674_0789
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Master programmer front panel no. 2 PX-8-302R
ID: 39088015278674_0791
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Fig. 10-1. Use of master programmer to stimulate ...
ID: 39088015278674_0827
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Fig. 10-2 (a) Digit discrimination program ... PX-8-402a
ID: 39088015278674_0829
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Fig. 10-2 (b). Digit discrimination program ... Master programmer panel 2. PX-8-402 b
ID: 39088015278674_0831
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Fig. 10-2 (c). Digit discrimination program to stimulate ...
ID: 39088015278674_0833
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Fig. 10-3. Us of a master programmer to delay a program pulse
ID: 39088015278674_0843
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Fig. 10-4. Master programmer set-up diagram conventions
ID: 39088015278674_0847
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Master programmer links - problem 1. Fig. 10-5
ID: 39088015278674_0849
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Fig. 10-6. Set-up diagram - problem 1. Master programmer panel 1. PX-8-404
ID: 39088015278674_0855
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Figure 10-7. Subsequences of seq. 2 - problem 2. PX-8-405
ID: 39088015278674_0861
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Fig. 10-8. Master programmer links - problem 2
ID: 39088015278674_0865
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Fig. 10-9 (a). Set up diagram for tests ... Master programmer panel 2
ID: 39088015278674_0875
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Fig. 10-9 (b). Set-up diagram for tests ...
ID: 39088015278674_0877
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Fig. 10-9 (c). Set up diagram for tests ...
ID: 39088015278674_0879
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Table 10-5. Set-up table for tests ...
ID: 39088015278674_0881
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Shifter (-2 & 2). PX-4-104a
ID: 39088015278674_0889
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Deleters. PX-4-109
ID: 39088015278674_0895
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Pulse amplifier block diagram. PX-4-301
ID: 39088015278674_0905
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Fig. 11-2. Bidirectional communication in pulse amplifier connected trays
ID: 39088015278674_0909
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Fig. 11-3. Isolation of programs through the use of a pulse amplifier
ID: 39088015278674_0911
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